1. Field of the Invention
The present invention relates to an analog-to-digital (A/D) converting device, and more particularly, to a two-step analog-to-device converting device.
2. Description of the Related Art
The analog-to-digital (abbreviated as A/D hereinafter) converter is applied to convert an analog signal which is continuous into a digital signal which is discrete by quantizing and sampling the analog signal. The advantages of the digital signal include: capable of providing a higher noise resistance; additional bits may be added to improve the capability of error detection; and the code error rate can be reduced by appropriate encoding. Accordingly, the reliability and stability of the digital signal is much better than the reliability and stability of the analog signal.
FIG. 1A schematically shows a 3-bit flash A/D converter. As shown in the diagram, the reference voltage VREF is divided by 8 resistors of the same resistance R, thus the voltage levels of V1=VREF/8, V2=2VREF/8, V3=3VREF/8, . . . , V7=7VREF/8 are generated. Then, these voltages are input into the negative (−) terminals of the comparators 101, respectively. In addition, an analog signal Va is input into the positive (+) terminals of the comparators 101, respectively. Each one of the comparators 101 compares the signal input from the positive terminal and the signal input from the negative terminal. For example, if 0<Va<V1, the outputs of all comparators 101 are equal to logic 0; if V2<Va<V3, the outputs Y1 and Y2 are equal to logic 1, and the outputs of all other comparators are equal to logic 0. The encoder 103 receives the outputs Y1, Y2, . . . , Y7 of all comparators 101 and outputs the digital signals D2, D1, D0. Please refer to FIG. 1B for the details of how the analog signal is converted into the digital signal; and other encoding method may be applied to encode the analog signal.
Such an A/D converter is advantageous in its fast conversion, thus it is also known as a flash A/D converter. However, the shortcoming of the A/D converter is that the total number of the resistors and the comparators is increased exponentially with the increase of bit number of the converted digital signal. For example, as shown in FIG. 2A (wherein only the resistors for dividing the reference voltage are shown), a 6-bit flash A/D converter requires 64 (=26) resistors and 63 (=26−1) comparators.
In order to reduce the total number of the resistors and the comparators, as shown in FIG. 2B (wherein only the resistors for dividing the reference voltage are shown), a 6-bit two-step A/D converter is applied; wherein, each step (or stage) has 3 bits, thus it only requires 16 (=2*23) resistors, 14 (=2*(23−1)) comparators and a switch circuit between these two stages. Under the condition of same bit number, the two-step A/D converter of FIG. 2B requires much less number of the resistors and the comparators than the flash A/D converter of FIG. 2A, thus a great amount of space and power consumption are saved. However, the two-step A/D converter requires a switch circuit for performing a switching operation between these two stages. For example, if the analog signal to be converted to the digital signal is between the voltage level of V2 and V3, the switching mechanism couples V8′ of the second stage to V3 of the first stage, and also couples V0′ of the second stage to V2 of the first stage (that is the voltage between V2 and V3 of the first stage is further divided by the second stage). Accordingly, the two-step A/D converter is slower than the flash A/D converter in its operation. Generally speaking, under the consideration of cost and speed trade-off, the two-step A/D converter configuration is more adopted.
Regarding to the switch circuit of the two-step A/D converter, if the switching operation is directly performed by a switch, the second stage will generate a loading effect on the switch part of the first stage. In order to eliminate this loading effect, a buffer may be further added between these two stages, such that the operation speed is decreased.